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STSJ80N4LLF3 N-channel 40V - 0.0042 - 18A - PowerSO-8TM STripFETTMIII Power MOSFET for DC-DC conversion General features Type STSJ80N4LLF3 VDSS 40V RDS(on) 0.005 ID 18A(1) 1. This value is rated according to Rthj-pcb Optimal RDS(on) x Qg trade-off @ 4.5V Switching losses reduced Low threshold device Improved junction-case thermal resistance PowerSO-8 Description This series of product utilizes the latest advanced design rules of ST's proprietary STripFETTM technology. This process coupled to unique metallization techniques realizes the most advanced low voltage Power MOSFET in SO-8 ever produced. The exposed slug reduces the Rthj-c improving the current capability. Internal schematic diagram Applications Switching application DRAIN CONTACT ALSO ON THE BACKSIDE Order codes Part number STSJ80N4LLF3 Marking 80N4LLPackage PowerSO-8 Packaging Tape & reel November 2006 Rev 3 1/12 www.st.com 12 Contents STSJ80N4LLF3 Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 Test circuit ................................................ 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 STSJ80N4LLF3 Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VGS VGS (1) Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate- source voltage Gate- source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 25C Drain current (continuous) at TC = 100C Drain current (pulsed) Total dissipation at TC = 25C Total dissipation at TC = 25C Maximum operating junction temperature Storage temperature Value 40 16 18 80 18 50 72 70 3 -55 to 150 Unit V V V A A A A W W C ID (2) ID ID (3) (2) (4) IDM Ptot(2) Ptot(3) Tj Tstg 1. Guaranteed for test time < 15ms 2. This value is rated according to Rthj-c 3. This value is rated according to Rthj-pcb 4. Pulse with limited by safe operating area Table 2. Symbol Rthj-c Rthj-pcb (1) Thermal data Parameter Thermal resistance junction-case max Thermal resistance junction-pcb max Value 1.8 42 Unit C/W C/W 1. When mounted on 1 inch FR-4 board, 2oz Cu (t<10sec.) 3/12 Electrical characteristics STSJ80N4LLF3 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate-body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 250A, VGS = 0 VDS = 40V, TC = 25C VDS = 40V, TC = 125C VGS = 16V VDS = VGS, ID = 250A VGS = 10V, ID = 9A VGS = 4.5V, ID = 9A 1 0.0042 0.005 0.005 0.007 Min. 40 10 100 200 Typ. Max. Unit V A A nA V Table 4. Symbol Ciss Coss Crss Qg Qgs Qgd RG Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions Min. Typ. 2530 574 29 21.5 6.9 8.2 1 3 28 Max. Unit pF pF pF VDS = 25V, f = 1MHz, VGS = 0 VDD = 20V, ID = 18A VGS = 4.5V (see Figure 13) f=1 MHz Gate DC Bias = 0 Test signal level = 20mV open drain nC nC nC Gate input resistance 5 4/12 STSJ80N4LLF3 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 20V, ID = 9A RG = 4.7 , VGS = 10V (see Figure 15) VDD = 20V, ID = 9A RG = 4.7 , VGS = 10V (see Figure 15) Min. Typ. 17 25 62 9 Max. Unit ns ns ns ns Table 6. Symbol ISD ISDM VSD(1) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 18A , VGS = 0 ISD = 18A, di/dt = 100A/s VDD = 30V, Tj = 150C (see Figure 14) 43 64 3 Test conditions Min. Typ. Max. 18 72 1.2 Unit A A V ns nC A 1. Pulsed: pulse duration = 300s, duty cycle 1.5% 5/12 Electrical characteristics STSJ80N4LLF3 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Normalized BVDSS vs temperature Figure 6. Static drain-source on resistance 6/12 STSJ80N4LLF3 Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics 7/12 Test circuit STSJ80N4LLF3 3 Test circuit Figure 13. Gate charge test circuit Figure 12. Switching times test circuit for resistive load Figure 14. Test circuit for inductive load Figure 15. Unclamped inductive load test switching and diode recovery times circuit Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform 8/12 STSJ80N4LLF3 Package mechanical data 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STSJ80N4LLF3 PowerSO-8TM MECHANICAL DATA mm. MIN. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 2.79 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.14 0.015 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.188 0.228 0.050 0.150 0.110 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 DIM. A a1 a2 a3 b b1 C c1 D E e e3 e4 F L M S 10/12 STSJ80N4LLF3 Revision history 5 Revision history Table 7. Date 13-May-2005 23-Jun-2006 22-Nov-2006 Revision history Revision 1 2 3 Initial release. New template, complete version Corrected part number Changes 11/12 STSJ80N4LLF3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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